This is a description of differences in the programming registers of
the Chrontel encoder chips.

So far, I have only looked at:

CH7003B
CH7005C
CH7007A

The main difference seems to be in the Input Data Formats. Here's a table
of all of them:

IDF

0    16-bit   Non-mux   RGB 16-bit      5-6-5 each word
1    16-bit   Non-mux   YCrCb (24-bit)  CbY0,CrY1...(CCIR656 style)
2    16-bit   2X-mux    RGB 24 (32)     8-8,8X over two words
3    15-bit   Non-mux   RGB 15-bit      5-5-5 each word
4    12-bit   2X-mux    RGB 24          8-8-8 over two words - `C' version
5    12-bit   2X-mux    RGB 24          8-8-8 over two words - `I' version
6    8-bit    3X-mux    RGB 24-bit      8-8-8 over three bytes
7    8-bit    2X-mux    RGB 16-bit      5-6-5 over two bytes
8    8-bit    2X-mux    RGB 15-bit      5-5-5 over two bytes
9    8-bit    2X-mux    YCrCb (24-bit)  Cb,Y0,Cr,Y1,(CCIR656 style)

CH7003B: 0-9
CH7005C: 0-9
CH7007A: 4-5, 7-9

CH7003B: I2C addr = EA/EB, EC/ED 
CH7007A: only EA/EB

Registers

0x00:
CH7003B: Modes 0-24
CH7005C: Modes 0-28 (PAL 720x576i, NTSC 720x480i, PAL 800x500i, NTSC 640x400i)
CH7007A: Modes 0-26 (PAL 720x576i, NTSC 720x480i)

0x01:
CH7003B: no FC,FY,FT; only FF (see Data Sheet)

0x03:
CH7003B: Modes 0-9
CH7005C: Modes 0-9
CH7007A: Modes 4-5, 7-9;  no RGBBP

0x13:
CH7005C: Bit 4=SNE, 3=SNP in table; but reserved in description

0x1b:
CH7003B: no DVDD2, P-OUTP, GPIOIN*
CH7005C: no DVDD3, GPIOIN*

0x1c:
CH7003B: no DSM, DSEN, GOENB*
CH7005C: no DSM, GOENB*

0x21:
CH7003B: no CIV25, CIV24

0x25:
CH7003B: no VID7-5

Timing

CH7003B: 1x 20ns-50ns, 2x 10ns-25ns, 3x 10ns-17ns



